System - Level Design for Test of Fully Di erential Analog

{ Analog IC test occupies a signiicant fraction of the design cycle. Testing costs are increased by the twin requirements of high precision and accuracy in signal measurement. We discuss a system level ACOB technique for fully diierential analog ICs. Our test techniques incorporate analog speciic constraints such as device matching, and circuit and switching noise. They have a minimal impact on performance, area and power. The techniques can be used for both discrete and continuous time circuits, over a wide frequency range. The system level DFT scheme is also used to design a self-testing switched capacitor lter. Our checking scheme provides signiicant fault coverage and is demonstrably superior to other DFT techniques for diierential circuits.